module CHR(sysclk,reset,fsmChrEn,fsmChrData,aluChrEn,aluChrData,
           chrStackPush,chrCoderEn,chrAllData,SpyChrData,SpyChrFlag);

input           sysclk,reset;
input [2:0]     fsmChrEn;
input [7:0]     fsmChrData;
input [1:0]     aluChrEn;
input [16:0]    aluChrData;




output reg              chrStackPush;
output reg              chrCoderEn;
output reg [16:0]       chrAllData;
output wire [3:0]        SpyChrData;
output reg 					SpyChrFlag;


parameter       Hold    =3'b000,
                Shift   =3'b001,
                Fush    =3'b010,
                Chx     =3'b011,
                Clx     =3'b100;
reg [7:0 ]      tempChr;
reg [16:0]      InnerData;
reg [15:0]      part_a;
reg [15:0]      part_b;
reg 				 PreFlag; 		//this flag used to make sure it is the first 4 bits;


assign SpyChrData	=chrAllData[3:0];

always@(posedge sysclk)
        if(reset)begin
                chrStackPush    = 0;
                chrCoderEn      = 0;
                chrAllData      = 17'h0;
                InnerData       = 17'h0;
					 PreFlag			  = 1;
					 SpyChrFlag			=0;
                end
        else if(~|aluChrEn) begin
                case(fsmChrEn)
                Hold:begin
                        InnerData =InnerData;
								chrAllData = chrAllData;
                        chrStackPush=1'b0;
								chrCoderEn 	= 0;
                        end
                Shift:begin
                        tempChr =fsmChrData-8'd48;
//                        part_a  <=InnerData[15:0]<<3;
//								  part_b  <=InnerData[15:0]<<1;
//                        InnerData={InnerData[16],(part_a+part_b+tempChr)};
								if(PreFlag)begin
								InnerData=tempChr;
								PreFlag  = 0;
								end else begin
								InnerData=InnerData*10+tempChr;
								end
								chrAllData =InnerData;
								chrCoderEn	= 0;
                        end
                Fush:begin
								chrAllData	=InnerData;
                        chrStackPush=1'b1;
								chrCoderEn	= 1;
								PreFlag 		= 1;
								InnerData = 17'b0;
                     end
                Chx :begin
                        InnerData[16]=~InnerData[16];
								chrCoderEn	= 1;
								chrAllData =InnerData;
                     end
                Clx :begin
                        InnerData = 17'h0;
								chrCoderEn	= 1;
								chrAllData =InnerData;
								PreFlag		= 1;
                     end
                default:begin
                        InnerData=InnerData;
                        chrStackPush=1'b0;
								PreFlag		= 1;
                        end
        endcase
        end
        else begin
                case(aluChrEn)
								2'b00:InnerData=InnerData;
                        2'b01:chrAllData=InnerData;
                        2'b10:begin
										  SpyChrFlag =1;
                                InnerData=aluChrData;
										  chrCoderEn=1;
										  chrAllData=InnerData;
                                end
                        default:InnerData=InnerData;
                endcase
        end

endmodule
